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Added k-line files from 1.9 version, works until dfi

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This commit is contained in:
LucianoDev
2026-03-30 21:33:37 +02:00
parent c9c2abb4a6
commit b43177774e
13 changed files with 2001 additions and 18 deletions
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2
Core/Inc/stm32g4xx_it.h
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@@ -60,9 +60,11 @@ void DMA1_Channel1_IRQHandler(void);
void DMA1_Channel2_IRQHandler(void);
void FDCAN1_IT0_IRQHandler(void);
void TIM1_BRK_TIM15_IRQHandler(void);
void TIM1_TRG_COM_TIM17_IRQHandler(void);
void TIM1_CC_IRQHandler(void);
void TIM2_IRQHandler(void);
void TIM3_IRQHandler(void);
void USART1_IRQHandler(void);
void TIM6_DAC_IRQHandler(void);
/* USER CODE BEGIN EFP */

274
Core/Kline_Libs/IKW1281Connection.c Normal file
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@@ -0,0 +1,274 @@
/* IKW1281Connection.c — byte pump, RX FIFO, no HAL_Delay() in hot path */
#include <stdint.h>
#include <stdlib.h>
#include <string.h>
#include "IKW1281Connection.h"
#include "main.h"
extern UART_HandleTypeDef huart1;
uint8_t K_TxData[KLINE_BUFFER_SIZE];
volatile uint8_t rx_done_flag = 0;
// ---------- RX FIFO ----------
static uint8_t rx_fifo[KLINE_RX_FIFO_SZ];
static volatile uint16_t rx_head = 0, rx_tail = 0;
static inline int rx_fifo_push(uint8_t b){
uint16_t next = (uint16_t)((rx_head + 1U) % KLINE_RX_FIFO_SZ);
if (next == rx_tail) rx_tail = (uint16_t)((rx_tail + 1U) % KLINE_RX_FIFO_SZ); // drop oldest
rx_fifo[rx_head] = b;
rx_head = next;
rx_done_flag = 1;
return 1;
}
int KLine_RxFifo_Pop(uint8_t *out){
if (rx_head == rx_tail) return 0;
uint8_t b = rx_fifo[rx_tail];
rx_tail = (uint16_t)((rx_tail + 1U) % KLINE_RX_FIFO_SZ);
if (out) *out = b;
return 1;
}
// ---------- Non-blocking TX "byte pump" ----------
volatile KTxEngine ktx = {0};
static uint8_t tx_byte_1;
static uint8_t _packetCounter = 0;
static uint8_t _packetCounterInitialized = 0;
void KLine_BytePump_Init(void){ memset((void*)&ktx, 0, sizeof(ktx)); }
int KLine_TxStart(const uint8_t *data, uint16_t len, uint8_t append_end, uint8_t require_ack){
if (ktx.active==1) return 0;
if (len > KLINE_TXBUF_MAX) {
// defensive: refuse too-long sends (KWP1281 blocks are small, so this is fine)
return 0;
}
memcpy(ktx.ibuf, data, len);
ktx.buf = ktx.ibuf;
ktx.using_ibuf = 1;
ktx.active = 1; ktx.len = len; ktx.idx = 0;
ktx.append_end = append_end; ktx.last_tx = 0; ktx.awaiting_echo = 0;
ktx.require_ack = require_ack; ktx.tx_inflight = 0; ktx.next_time_ms = HAL_GetTick();
return 1;
}
int KLine_TxBusy(void){ return ktx.active || ktx.tx_inflight || ktx.awaiting_echo; }
void KLine_BytePump_Service(void){
if (!ktx.active) return;
uint32_t now = HAL_GetTick();
if (ktx.awaiting_echo) return;
//if (ktx.tx_inflight) return;
if ((int32_t)(now - ktx.next_time_ms) < 0) return;
uint8_t b;
if (ktx.idx < ktx.len) b = ktx.buf[ktx.idx++];
else if (ktx.append_end) {
b = PACKET_END_EXPECTED;
ktx.append_end = 0;
ktx.active = 2; //ENDING
}
else { // === FINISHED: make sure state is fully reset ===
ktx.active = 0;
//ktx.awaiting_echo = 0; // <— add //TODO
//ktx.tx_inflight = 0; // <— add
// (optional) ktx.next_time_ms = now;
return;
}
tx_byte_1 = b;
if (HAL_UART_Transmit_IT(&huart1, &tx_byte_1, 1) == HAL_OK){
//ktx.tx_inflight = 1;
ktx.last_tx = b;
if (ktx.require_ack && ktx.active == 1){
ktx.awaiting_echo = 1; // expect tester's ~b
} else {
ktx.awaiting_echo = 0;
}
ktx.next_time_ms = now + KWP_P1_GAP_MS;
}
}
//int pepe = 0;
// Called from HAL_UART_RxCpltCallback (kline.c)
void KLine_OnByteReceived(uint8_t byte)
{
uint32_t now = HAL_GetTick();
// ---- Self-echo suppression: only within a tiny time window after our TX ----
if(ktx.active){
if ((uint32_t)(now - ktx.last_tx_done_ms) <= KWP_ECHO_SUPPRESS_MS && byte == ktx.last_tx) {
if(ktx.active == 2){
ktx.active = 0;
ktx.awaiting_echo = 0;
}
return; // echo of our own last TX byte
//no se bien si me quita el echo o el counter, habra que ver despues cuando los mensajes no sean de 03
}
}
/*if(pepe==2){
pepe++;
}*/
/*if(ktx.awaiting_ack && byte == ktx.last_tx){
return;
}*/
// ---- Tester complement for our TX byte? consume only if it matches ~last_tx ----
if (ktx.active == 1) {
if(ktx.awaiting_echo){
if (byte == (uint8_t)~ktx.last_tx) {
ktx.awaiting_echo = 0;
//return; // consumed tester's complement
} else {
// Not a complement: treat as inbound payload, drop awaiting flag to resync
ktx.awaiting_echo = 0;
//ktx.active = 0; //we are done, communication failed drop message.
//return;
// fall through to inbound handling
}
}
}
else{
//WriteComplement(byte); //then its inboud payload, echo
rx_fifo_push(byte);
}
// ---- Inbound byte from tester: ACK it immediately so we never race timing ----
// (Tiny 1-byte blocking write; safe and deterministic at 9600 bps.)
//WriteComplement(byte);
// Push for higher-level parsing
}
void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart){
if (huart->Instance == USART1) {
//ktx.tx_inflight = 0;
ktx.last_tx_done_ms = HAL_GetTick(); // <-- NEW
}
}
// ---------- Legacy/compat API (kept) ----------
uint8_t ReadByte(){
uint32_t timeout = HAL_GetTick() + 1000;
uint8_t b;
while (!KLine_RxFifo_Pop(&b)){
if ((int32_t)(HAL_GetTick() - timeout) >= 0) return 0xFF;
}
return b;
}
uint8_t ReadAndAckByte(void){ uint8_t b = ReadByte(); WriteComplement(b); return b; }
void WriteComplement(uint8_t b){
uint8_t c = (uint8_t)~b;
WriteByteRaw(c); }
void WriteByteRaw(uint8_t b){
ktx.active = 0;
KLine_TxStart(&b, 1, 0, 0);
while (KLine_TxBusy()) KLine_BytePump_Service();
/*ktx.last_tx = b;
ktx.active = 2;
pepe++;
if(b == 0x01){
pepe++;
}
extern UART_HandleTypeDef huart1;
(void)HAL_UART_Transmit(&huart1, &b, 1, 5);*/
}
#define MAX_PACKETS 16
static ParsedPacket packets_buffer[MAX_PACKETS];
ParsedPacket* ReceivePackets(int *out_count){
int count = 0;
while (1){
if (count >= MAX_PACKETS) break;
ParsedPacket p = ReceivePacket();
packets_buffer[count++] = p;
if (p.isAckNak) break;
SendAckPacket();
}
if (out_count) *out_count = count;
return packets_buffer;
}
ParsedPacket ReceivePacket(){
ParsedPacket packet = (ParsedPacket){0};
uint8_t idx = 0;
uint8_t packetLength = ReadAndAckByte(); packet.raw[idx++] = packetLength;
uint8_t packetCounter = ReadPacketCounter(); packet.raw[idx++] = packetCounter;
uint8_t packetCommand = ReadAndAckByte(); packet.raw[idx++] = packetCommand;
for (int i=0;i<packetLength-3;i++){
uint8_t b = ReadAndAckByte(); packet.raw[idx++] = b;
}
uint8_t end = ReadByte(); packet.raw[idx++] = end; packet.length = idx;
if (end != PACKET_END_EXPECTED) return packet;
packet.title = packetCommand;
switch (packetCommand){
case PACKET_CMD_ACK: packet.type = PACKET_TYPE_ACK; packet.isAckNak = 1; break;
case PACKET_CMD_NAK: packet.type = PACKET_TYPE_NAK; packet.isAckNak = 1; break;
case PACKET_CMD_AsciiData:
packet.type = (packet.raw[3] == 0x00) ? PACKET_TYPE_CODING_WSC : PACKET_TYPE_ASCII_DATA; break;
case PACKET_CMD_ReadEepromResponse: packet.type = PACKET_TYPE_READ_EEPROM_RESPONSE; break;
case PACKET_CMD_ReadRomEepromResponse: packet.type = PACKET_TYPE_READ_ROM_EEPROM_RESPONSE; break;
default: packet.type = PACKET_TYPE_UNKNOWN; break;
}
return packet;
}
void ResetPacketCounter(){ _packetCounter = 0; _packetCounterInitialized = 0; }
uint8_t ReadPacketCounter(){
uint8_t v = ReadAndAckByte();
if (!_packetCounterInitialized){ _packetCounter = v; _packetCounterInitialized = 1; }
else if (v != _packetCounter){ /* optional mismatch handling */ }
_packetCounter++;
return v;
}
inline int32_t tick_diff(uint32_t a, uint32_t b){ return (int32_t)(a - b); }
int ReadByte_Tmo(uint32_t ms, uint8_t *out){
uint32_t deadline = HAL_GetTick() + ms; uint8_t b;
while (!KLine_RxFifo_Pop(&b)){
if ((int32_t)(HAL_GetTick() - deadline) >= 0) return 0;
}
if (out) *out = b; return 1;
}
int ReadPacketCounter_Tmo(uint32_t ms, uint8_t *out){
uint8_t v; if (!ReadByte_Tmo(ms, &v)) return 0;
if (!_packetCounterInitialized){ _packetCounter = v; _packetCounterInitialized = 1; }
else if (v != _packetCounter){ _packetCounter = v+1; return 0; }
_packetCounter++; WriteComplement(v);
if (out) *out = v; return 1;
}
int ReadAndAckByte_Tmo(uint32_t ms, uint8_t *out){
uint8_t b; if (!ReadByte_Tmo(ms, &b)) return 0; WriteComplement(b); if (out) *out = b; return 1;
}
void SendAckPacket(){ uint8_t a = (uint8_t)PACKET_CMD_ACK; SendPacket(&a, 1); }
void SendPacket(uint8_t* payload, uint8_t length){
uint8_t packetLength = (uint8_t)(length + 2);
static uint8_t packet[1 + 1 + MAX_PACKET_SIZE + 1];
int idx = 0;
packet[idx++] = packetLength;
packet[idx++] = _packetCounter++;
for (int i=0;i<length;i++) packet[idx++] = payload[i];
KLine_TxStart(packet, idx, 1 /*append 0x03*/, 1 /*expect complement*/);
while (KLine_TxBusy()) KLine_BytePump_Service(); // cooperative wait (no HAL_Delay)
}
// Convenience used by your code
ParsedPacket* SendCustom(const uint8_t* data, int len, int *out_count, uint8_t isBRKT){
(void)isBRKT; SendPacket((uint8_t*)data, len);
int count = 0; ParsedPacket* p = ReceivePackets(&count);
if (out_count) *out_count = count; return p;
}

136
Core/Kline_Libs/IKW1281Connection.h Normal file
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@@ -0,0 +1,136 @@
/* IKW1281Connection.h — non-blocking byte-pump + proper timings */
#ifndef INC_IKW1281CONNECTION_H_
#define INC_IKW1281CONNECTION_H_
#include <string.h>
#include "stdint.h"
extern uint8_t K_RxData[];
extern volatile uint8_t rx_done_flag;
#define KLINE_BUFFER_SIZE 20
#define PACKET_END_EXPECTED 0x03
// === Protocol sizing ===
#define MAX_PACKET_SIZE 16 // KWP1281 block size
// === Timings (per ISO 9141-2 / KWP1281) ===
#define KWP_P4_MIN_MS 5U // tester inter-byte (P4) 5..20 ms
#define KWP_P4_MAX_MS 20U
#define KWP_P1_GAP_MS 5U // ECU inter-byte (P1) target
#define KWP_ECHO_SUPPRESS_MS 3U // ~3 ms window after TX to drop self-echo
// 5-baud init post-switch delays
#define KWP_W1_MS 300U // ECU internal time before 0x55 (20..300 ms allowed)
#define KWP_W2_MS 10U // 0x55 -> first keyword (5..20 ms)
#define KWP_W3_MS 10U // KW LSB -> KW MSB (0..20 ms)
// RX FIFO
#define KLINE_RX_FIFO_SZ 64
typedef struct {
char client_ident[13];
char unk_ident1[11];
char soft_info[11];
char unk_ident2[11];
char unk_ident3[11];
char unk_ident4[7];
} ControllerInfo;
typedef enum {
PACKET_CMD_ReadIdent = 0x00,
PACKET_CMD_ReadIdentAdress = 0x01,
PACKET_CMD_ReadRomEeprom = 0x03,
PACKET_CMD_ActuatorTest = 0x04,
PACKET_CMD_FaultCodesDelete = 0x05,
PACKET_CMD_End = 0x06,
PACKET_CMD_FaultCodesRead = 0x07,
PACKET_CMD_ACK = 0x09,
PACKET_CMD_NAK = 0x0A,
PACKET_CMD_SoftwareCoding = 0x10,
PACKET_CMD_LoginEeprom = 0x18,
PACKET_CMD_ReadEeprom = 0x19,
PACKET_CMD_WriteEeprom = 0x1A,
PACKET_CMD_Custom = 0x1B,
PACKET_CMD_GroupReading = 0x29,
PACKET_CMD_Login = 0x2B,
PACKET_CMD_GroupReadingResponse = 0xE7,
PACKET_CMD_ReadEepromResponse = 0xEF,
PACKET_CMD_ActuatorTestResponse = 0xF5,
PACKET_CMD_AsciiData = 0xF6,
PACKET_CMD_WriteEepromResponse = 0xF9,
PACKET_CMD_FaultCodesResponse = 0xFC,
PACKET_CMD_ReadRomEepromResponse = 0xFD
} PacketCommand;
typedef enum {
PACKET_TYPE_UNKNOWN = 0,
PACKET_TYPE_ACK,
PACKET_TYPE_NAK,
PACKET_TYPE_ASCII_DATA,
PACKET_TYPE_CODING_WSC,
PACKET_TYPE_READ_EEPROM_RESPONSE,
PACKET_TYPE_READ_ROM_EEPROM_RESPONSE
} PacketType;
typedef struct {
PacketType type;
uint8_t title;
uint8_t length;
uint8_t raw[MAX_PACKET_SIZE];
uint8_t isAckNak;
} ParsedPacket;
#define KLINE_TXBUF_MAX 32 // enough for KWP1281: 2 header + 16 data + 0x03 + margins
// === Non-blocking TX "byte pump" ===
typedef struct {
uint8_t active;
const uint8_t *buf;
uint16_t len;
uint16_t idx;
uint8_t append_end; // append 0x03
uint8_t last_tx;
uint8_t awaiting_echo; // waiting for complement
uint8_t require_ack; // expect complement per byte?
uint8_t tx_inflight; // HAL_UART_Transmit_IT in progress
uint32_t next_time_ms; // next earliest send time
uint32_t last_tx_done_ms; // last send time
uint8_t ibuf[KLINE_TXBUF_MAX];
uint8_t using_ibuf;
} KTxEngine;
extern volatile KTxEngine ktx;
void KLine_BytePump_Init(void);
void KLine_BytePump_Service(void);
int KLine_TxStart(const uint8_t *data, uint16_t len, uint8_t append_end, uint8_t require_ack);
int KLine_TxBusy(void);
// RX FIFO helpers
int KLine_RxFifo_Pop(uint8_t *out);
void KLine_OnByteReceived(uint8_t byte);
// Legacy/blocking API (still available)
void SendPacket(uint8_t* payload, uint8_t length);
void SendAckPacket(void);
void WriteByteAndReadAck(uint8_t b);
void WriteByteRaw(uint8_t b);
void WriteComplement(uint8_t b);
extern ParsedPacket ReceivePacket(void);
extern uint8_t ReadByte(void);
extern uint8_t ReadAndAckByte(void);
extern void ResetPacketCounter(void);
extern uint8_t ReadPacketCounter(void);
extern inline int32_t tick_diff(uint32_t a, uint32_t b);
// Timed reads used by higher layers
int ReadByte_Tmo(uint32_t ms, uint8_t *out);
int ReadPacketCounter_Tmo(uint32_t ms, uint8_t *out);
int ReadAndAckByte_Tmo(uint32_t ms, uint8_t *out);
#endif /* INC_IKW1281CONNECTION_H_ */

1281
Core/Kline_Libs/kline.c Normal file
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File diff suppressed because it is too large Load Diff

38
Core/Kline_Libs/kline.h Normal file
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@@ -0,0 +1,38 @@
/* kline.h — cleaned up, matches new connection layer */
#ifndef INC_KLINE_H_
#define INC_KLINE_H_
#include "IKW1281Connection.h"
#define ECU_INIT_ADDRESS 0xF1
#define KLINE_RX_PIN GPIO_PIN_10
#define KLINE_TX_PIN GPIO_PIN_9
#define KLINE_GPIO_PORT GPIOA
#define SLAVE_ADDR 0xF1
#define SYNC_BYTE 0x55
#define POST_INIT_BAUD 9600
#define KEYWORD_LSB 0x8C
#define KEYWORD_MSB 0x51
#define REQUIRE_KEY_ACK 0 // no complements expected during 0x55/keywords
extern volatile uint8_t kline_connection_status;
typedef struct {
uint8_t dtc;
uint8_t status;
uint8_t extra;
} FaultCode;
size_t BuildCombinedFromInfo(const ControllerInfo *ci, uint8_t *out, size_t maxlen);
void KLine_Slave_Init(void);
void KLine_Rearm5Baud(void);
void KLine_Service(void);
void KLine_ServiceCommands(void);
void KLine_Slave_Poll(void);
void KLine_KeepAlivePoll(void);
#endif /* INC_KLINE_H_ */

25
Core/Kline_Libs/psg_prop.h Normal file
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@@ -0,0 +1,25 @@
/*
* psg_prop.h
*
* Created on: Aug 19, 2025
* Author: herli
*/
#ifndef INC_PSG_PROP_H_
#define INC_PSG_PROP_H_
typedef struct {
char client_ident[13]; // 12 + null
char unk_ident1[11];
char soft_info[11];
char unk_ident2[11];
char unk_ident3[11];
} PSGControllerInfo;
#define i_Ident "0470504005"
#define i_SerialN "225832"
#define i_modIndex "000004"
#endif /* INC_PSG_PROP_H_ */

47
Core/Src/main.c
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@@ -31,7 +31,8 @@
#include "ee_manager.h"
#include "toothed_wheel.h"
#include "can_read_pump_data.h"
#include "kline.h"
#include "IKW1281Connection.h"
/* USER CODE END Includes */
/* Private typedef -----------------------------------------------------------*/
@@ -75,6 +76,7 @@ TIM_HandleTypeDef htim7;
TIM_HandleTypeDef htim8;
TIM_HandleTypeDef htim15;
TIM_HandleTypeDef htim16;
TIM_HandleTypeDef htim17;
UART_HandleTypeDef huart1;
@@ -108,6 +110,7 @@ static void MX_TIM16_Init(void);
static void MX_RTC_Init(void);
static void MX_TIM8_Init(void);
static void MX_OPAMP2_Init(void);
static void MX_TIM17_Init(void);
/* USER CODE BEGIN PFP */
void DAC_Voltaje(uint8_t isPeak);
void EvaluateInjection(void);
@@ -292,6 +295,7 @@ int main(void)
MX_RTC_Init();
MX_TIM8_Init();
MX_OPAMP2_Init();
MX_TIM17_Init();
/* USER CODE BEGIN 2 */
CAN_AppInit(); //ford might be too fast
@@ -343,6 +347,9 @@ int main(void)
}/*else{
SYNC_Pulse_EnableGPIO();
}*/
KLine_Slave_Init();
/* USER CODE END 2 */
/* Infinite loop */
@@ -352,6 +359,8 @@ int main(void)
/* USER CODE END WHILE */
/* USER CODE BEGIN 3 */
KLine_Service();
KLine_ServiceCommands(); // <-- NEW: react to ISR kick, process full packet
TW_Service();
CAN_Service(); // drain queued frames whenever HW has room
@@ -1304,6 +1313,42 @@ static void MX_TIM16_Init(void)
}
/**
* @brief TIM17 Initialization Function
* @param None
* @retval None
*/
static void MX_TIM17_Init(void)
{
/* USER CODE BEGIN TIM17_Init 0 */
/* USER CODE END TIM17_Init 0 */
/* USER CODE BEGIN TIM17_Init 1 */
/* USER CODE END TIM17_Init 1 */
htim17.Instance = TIM17;
htim17.Init.Prescaler = 160-1;
htim17.Init.CounterMode = TIM_COUNTERMODE_UP;
htim17.Init.Period = 65535;
htim17.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
htim17.Init.RepetitionCounter = 0;
htim17.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
if (HAL_TIM_Base_Init(&htim17) != HAL_OK)
{
Error_Handler();
}
if (HAL_TIM_OnePulse_Init(&htim17, TIM_OPMODE_SINGLE) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN TIM17_Init 2 */
/* USER CODE END TIM17_Init 2 */
}
/**
* @brief USART1 Initialization Function
* @param None

50
Core/Src/stm32g4xx_hal_msp.c
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@@ -639,6 +639,8 @@ void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
/* TIM1 interrupt Init */
HAL_NVIC_SetPriority(TIM1_BRK_TIM15_IRQn, 5, 0);
HAL_NVIC_EnableIRQ(TIM1_BRK_TIM15_IRQn);
HAL_NVIC_SetPriority(TIM1_TRG_COM_TIM17_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(TIM1_TRG_COM_TIM17_IRQn);
HAL_NVIC_SetPriority(TIM1_CC_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(TIM1_CC_IRQn);
/* USER CODE BEGIN TIM1_MspInit 1 */
@@ -746,6 +748,20 @@ void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
/* USER CODE END TIM16_MspInit 1 */
}
else if(htim_base->Instance==TIM17)
{
/* USER CODE BEGIN TIM17_MspInit 0 */
/* USER CODE END TIM17_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_TIM17_CLK_ENABLE();
/* TIM17 interrupt Init */
HAL_NVIC_SetPriority(TIM1_TRG_COM_TIM17_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(TIM1_TRG_COM_TIM17_IRQn);
/* USER CODE BEGIN TIM17_MspInit 1 */
/* USER CODE END TIM17_MspInit 1 */
}
}
@@ -823,6 +839,14 @@ void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base)
/* HAL_NVIC_DisableIRQ(TIM1_BRK_TIM15_IRQn); */
/* USER CODE END TIM1:TIM1_BRK_TIM15_IRQn disable */
/* USER CODE BEGIN TIM1:TIM1_TRG_COM_TIM17_IRQn disable */
/**
* Uncomment the line below to disable the "TIM1_TRG_COM_TIM17_IRQn" interrupt
* Be aware, disabling shared interrupt may affect other IPs
*/
/* HAL_NVIC_DisableIRQ(TIM1_TRG_COM_TIM17_IRQn); */
/* USER CODE END TIM1:TIM1_TRG_COM_TIM17_IRQn disable */
HAL_NVIC_DisableIRQ(TIM1_CC_IRQn);
/* USER CODE BEGIN TIM1_MspDeInit 1 */
@@ -936,6 +960,27 @@ void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base)
/* USER CODE END TIM16_MspDeInit 1 */
}
else if(htim_base->Instance==TIM17)
{
/* USER CODE BEGIN TIM17_MspDeInit 0 */
/* USER CODE END TIM17_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_TIM17_CLK_DISABLE();
/* TIM17 interrupt DeInit */
/* USER CODE BEGIN TIM17:TIM1_TRG_COM_TIM17_IRQn disable */
/**
* Uncomment the line below to disable the "TIM1_TRG_COM_TIM17_IRQn" interrupt
* Be aware, disabling shared interrupt may affect other IPs
*/
/* HAL_NVIC_DisableIRQ(TIM1_TRG_COM_TIM17_IRQn); */
/* USER CODE END TIM17:TIM1_TRG_COM_TIM17_IRQn disable */
/* USER CODE BEGIN TIM17_MspDeInit 1 */
/* USER CODE END TIM17_MspDeInit 1 */
}
}
@@ -1001,6 +1046,9 @@ void HAL_UART_MspInit(UART_HandleTypeDef* huart)
GPIO_InitStruct.Alternate = GPIO_AF7_USART1;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
/* USART1 interrupt Init */
HAL_NVIC_SetPriority(USART1_IRQn, 5, 0);
HAL_NVIC_EnableIRQ(USART1_IRQn);
/* USER CODE BEGIN USART1_MspInit 1 */
/* USER CODE END USART1_MspInit 1 */
@@ -1031,6 +1079,8 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
*/
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_9|GPIO_PIN_10);
/* USART1 interrupt DeInit */
HAL_NVIC_DisableIRQ(USART1_IRQn);
/* USER CODE BEGIN USART1_MspDeInit 1 */
/* USER CODE END USART1_MspDeInit 1 */

31
Core/Src/stm32g4xx_it.c
View File

@@ -69,6 +69,8 @@ extern TIM_HandleTypeDef htim2;
extern TIM_HandleTypeDef htim3;
extern TIM_HandleTypeDef htim6;
extern TIM_HandleTypeDef htim15;
extern TIM_HandleTypeDef htim17;
extern UART_HandleTypeDef huart1;
/* USER CODE BEGIN EV */
/* USER CODE END EV */
@@ -282,6 +284,21 @@ void TIM1_BRK_TIM15_IRQHandler(void)
/* USER CODE END TIM1_BRK_TIM15_IRQn 1 */
}
/**
* @brief This function handles TIM1 trigger and commutation interrupts and TIM17 global interrupt.
*/
void TIM1_TRG_COM_TIM17_IRQHandler(void)
{
/* USER CODE BEGIN TIM1_TRG_COM_TIM17_IRQn 0 */
/* USER CODE END TIM1_TRG_COM_TIM17_IRQn 0 */
HAL_TIM_IRQHandler(&htim1);
HAL_TIM_IRQHandler(&htim17);
/* USER CODE BEGIN TIM1_TRG_COM_TIM17_IRQn 1 */
/* USER CODE END TIM1_TRG_COM_TIM17_IRQn 1 */
}
/**
* @brief This function handles TIM1 capture compare interrupt.
*/
@@ -357,6 +374,20 @@ void TIM3_IRQHandler(void)
/* USER CODE END TIM3_IRQn 1 */
}
/**
* @brief This function handles USART1 global interrupt / USART1 wake-up interrupt through EXTI line 25.
*/
void USART1_IRQHandler(void)
{
/* USER CODE BEGIN USART1_IRQn 0 */
/* USER CODE END USART1_IRQn 0 */
HAL_UART_IRQHandler(&huart1);
/* USER CODE BEGIN USART1_IRQn 1 */
/* USER CODE END USART1_IRQn 1 */
}
/**
* @brief This function handles TIM6 global interrupt, DAC1 and DAC3 channel underrun error interrupts.
*/