Firmware/hpsg5-controller_v2-stm32g4
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Added k-line files from 1.9 version, works until dfi

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This commit is contained in:
LucianoDev
2026-03-30 21:33:37 +02:00
parent c9c2abb4a6
commit b43177774e
13 changed files with 2001 additions and 18 deletions
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50
Core/Src/stm32g4xx_hal_msp.c
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@@ -639,6 +639,8 @@ void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
/* TIM1 interrupt Init */
HAL_NVIC_SetPriority(TIM1_BRK_TIM15_IRQn, 5, 0);
HAL_NVIC_EnableIRQ(TIM1_BRK_TIM15_IRQn);
HAL_NVIC_SetPriority(TIM1_TRG_COM_TIM17_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(TIM1_TRG_COM_TIM17_IRQn);
HAL_NVIC_SetPriority(TIM1_CC_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(TIM1_CC_IRQn);
/* USER CODE BEGIN TIM1_MspInit 1 */
@@ -746,6 +748,20 @@ void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
/* USER CODE END TIM16_MspInit 1 */
}
else if(htim_base->Instance==TIM17)
{
/* USER CODE BEGIN TIM17_MspInit 0 */
/* USER CODE END TIM17_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_TIM17_CLK_ENABLE();
/* TIM17 interrupt Init */
HAL_NVIC_SetPriority(TIM1_TRG_COM_TIM17_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(TIM1_TRG_COM_TIM17_IRQn);
/* USER CODE BEGIN TIM17_MspInit 1 */
/* USER CODE END TIM17_MspInit 1 */
}
}
@@ -823,6 +839,14 @@ void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base)
/* HAL_NVIC_DisableIRQ(TIM1_BRK_TIM15_IRQn); */
/* USER CODE END TIM1:TIM1_BRK_TIM15_IRQn disable */
/* USER CODE BEGIN TIM1:TIM1_TRG_COM_TIM17_IRQn disable */
/**
* Uncomment the line below to disable the "TIM1_TRG_COM_TIM17_IRQn" interrupt
* Be aware, disabling shared interrupt may affect other IPs
*/
/* HAL_NVIC_DisableIRQ(TIM1_TRG_COM_TIM17_IRQn); */
/* USER CODE END TIM1:TIM1_TRG_COM_TIM17_IRQn disable */
HAL_NVIC_DisableIRQ(TIM1_CC_IRQn);
/* USER CODE BEGIN TIM1_MspDeInit 1 */
@@ -936,6 +960,27 @@ void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base)
/* USER CODE END TIM16_MspDeInit 1 */
}
else if(htim_base->Instance==TIM17)
{
/* USER CODE BEGIN TIM17_MspDeInit 0 */
/* USER CODE END TIM17_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_TIM17_CLK_DISABLE();
/* TIM17 interrupt DeInit */
/* USER CODE BEGIN TIM17:TIM1_TRG_COM_TIM17_IRQn disable */
/**
* Uncomment the line below to disable the "TIM1_TRG_COM_TIM17_IRQn" interrupt
* Be aware, disabling shared interrupt may affect other IPs
*/
/* HAL_NVIC_DisableIRQ(TIM1_TRG_COM_TIM17_IRQn); */
/* USER CODE END TIM17:TIM1_TRG_COM_TIM17_IRQn disable */
/* USER CODE BEGIN TIM17_MspDeInit 1 */
/* USER CODE END TIM17_MspDeInit 1 */
}
}
@@ -1001,6 +1046,9 @@ void HAL_UART_MspInit(UART_HandleTypeDef* huart)
GPIO_InitStruct.Alternate = GPIO_AF7_USART1;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
/* USART1 interrupt Init */
HAL_NVIC_SetPriority(USART1_IRQn, 5, 0);
HAL_NVIC_EnableIRQ(USART1_IRQn);
/* USER CODE BEGIN USART1_MspInit 1 */
/* USER CODE END USART1_MspInit 1 */
@@ -1031,6 +1079,8 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
*/
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_9|GPIO_PIN_10);
/* USART1 interrupt DeInit */
HAL_NVIC_DisableIRQ(USART1_IRQn);
/* USER CODE BEGIN USART1_MspDeInit 1 */
/* USER CODE END USART1_MspDeInit 1 */