added oem ckp acquisition, better for acceleration artifacts. Also added proper ckp offset calculation. id 700 sended an offset and a eeprom commit to pump. Other cfgs should be tested for this
This commit is contained in:
@@ -13,6 +13,7 @@
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#include "pre_injection.h"
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#include "temperature.h"
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float FBKW_DEMAND = 0.0;
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float FBKW_DC = 5;
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float FBKW_FEEDBACK = 0.0;
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@@ -173,6 +174,11 @@ void FBKW_CKP_ISR(void) {
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pwm_ckp_isr(&fbkw_rt);
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}
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float FBKW_GET_CKP_OFFSET(void) {
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return (float)get_ckp_zero() * 3.0f / 256.0f;
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//return (get_ckp_zero() >> 8) * 3.0f;
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}
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const pwm_runtime_t *FBKW_pipeline_runtime(void) {
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return &fbkw_rt;
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}
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@@ -9,6 +9,7 @@
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#define INC_FBKW_H_
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#include "main.h"
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#include "pwm.h"
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#include "ckp_acquisition.h"
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extern TIM_HandleTypeDef htim4;
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@@ -45,5 +46,5 @@ extern void FBKW_CKP_ISR();
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void FBKW_init(void);
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void FBKW_service(void);
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const pwm_runtime_t *FBKW_pipeline_runtime(void);
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float FBKW_GET_CKP_OFFSET(void);
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#endif /* INC_FBKW_H_ */
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@@ -14,9 +14,14 @@
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* ~cal+0x9E (the new ADR-SV-* / KW_SIM_UMSCHALTUNG diagnostic fields per
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* doc.txt 30.08.02). All T06215 cal field roles map to T06235 with the
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* +0x14 offset; the actual values were re-extracted from this ROM.
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* NOTE: there is also a +0x02 shift in the lower region — at minimum
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* cal+0x4c → cal+0x4e and cal+0xa0 → cal+0xa2 (both confirmed in FUN_6a4b
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* @ 0x6a4b). Lower-region scalars must be re-checked, not assumed unchanged.
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*
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* Notable value deltas vs T06215:
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* - setpoint_offset = cal+0x4c − cal+0x4e = 4399 − 3499 = +900 (T06215: -648).
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* - setpoint_offset = cal+0x4e − cal+0x50 = 3499 − 4228 = -729 (T06215 cal+0x4c−cal+0x4e = -648).
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* Cal-block +0x02 shift in this lower region; T06215's cal+0xa0 modulo
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* also moves to cal+0xa2 in T06235 (verified in FUN_6a4b @ 0x6a4b).
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* - init_p_gain_normal = +368 (T06215: +336)
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* - init_p_slope_large_pos = +2047 (T06215: +1792)
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* - init_integ_step_normal = +320 (T06215: +256)
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@@ -112,10 +117,16 @@ const pwm_calibration_t pwm_cal_rom = {
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/* CAN-decoded setpoint cal constants (lower region — invariant offsets) */
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.b_fb_kw_upper_bound = 7680, /* cal+0x004 */
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.b_fb_kw_lower_bound = (int16_t)0xFD00, /* cal+0x006 */
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.setpoint_offset = 900, /* cal+0x4c − cal+0x4e = 4399 − 3499 = 900 (T06215: -648) */
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.setpoint_offset = -729, /* cal+0x4e − cal+0x50 = 3499 − 4228 = -729 (T06215 cal+0x4c−cal+0x4e = -648) */
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.target_5e_min_clamp = (int16_t)0xFE00, /* cal+0x13E = -512 (T06215 cal+0x12A +0x14) */
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.can_aux_12e_max = 1451, /* cal+0x002 */
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/* CKP-zero acquisition (FUN_55e0 + FUN_6a4b chain) — values read from
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* rom_eeprom_dump_0000-9FFF_504042.bin at RWA4 + offset. */
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.ckp_zero_anchor = 4228, /* cal+0x050 @ 0x9C08 = 0x1084 */
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.can_dckp_offset_bias = 0, /* cal+0x052 @ 0x9C0A = 0x0000 */
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.ckp_modulus = 7680, /* cal+0x0A2 @ 0x9C5A = 0x1E00 (90° at 256/3°/unit) */
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/* Recovery / sustained-error machinery */
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.pi_state_c2_reload = 100, /* cal+0x128 (was T06215 cal+0x114) */
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.inj_qty_thresh = 96, /* cal+0x12A (was T06215 cal+0x116) */
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93
Core/Advance_Control/ckp_acquisition.c
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93
Core/Advance_Control/ckp_acquisition.c
Normal file
@@ -0,0 +1,93 @@
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/*
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* ckp_acquisition.c
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*
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* Created on: May 5, 2026
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* Author: herli
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*
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* Mirrors ROM FUN_55e0 @ 0x55e0 → FUN_6a4b @ 0x6a4b for the CKP-zero
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* acquisition path. See ckp_acquisition.h for the data-flow summary.
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*/
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#include "ckp_acquisition.h"
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#include "pwm.h" /* pwm_cal_rom + shra16 */
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#include "ee_manager.h"
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/* Inputs */
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int16_t B_CKP_OFFSET = 0;
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uint8_t commitCKP_offset = 0;
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/* RAM trims (DAT_0430 word, DAT_0404 signed byte) — see header. */
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int16_t CKP_RAM_TRIM_0430 = 0;
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int8_t CKP_RAM_TRIM_0404 = 0;
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/* Outputs */
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int16_t dCKP_OFFSET = 0;
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int16_t CKP_ZERO_OFFSET = 0;
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/* FUN_6a4b @ 0x6a4b core — DAT_0152 derivation only.
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*
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* ROM body (fulldissasembly.txt:20025–20061):
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* RW1E = cal[+0x50] + DAT_0430
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* RW1C = RW1E - DAT_0434 - cal[+0x52] + (int8_t)DAT_0404
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* while RW1C < 0 : RW1C += cal[+0xa2] ; JGE LAB_6a7e (signed)
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* while RW1C > cal[+0xa2] : RW1C -= cal[+0xa2] ; JLE LAB_6a8c (signed)
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* DAT_0152 = RW1C
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*
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* Side-effects (FUN_6c70 R8F/R90 derivation, DAT_02cb/R2C/R2D clears,
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* DAT_017a=5, DAT_0278 reload) belong to the CKP-decode synchronization
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* stage and are intentionally not ported here — see the plan's
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* "Out of scope" section.
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*/
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static void ckp_recompute_zero_offset(void)
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{
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int16_t anchor = (int16_t)((int16_t)pwm_cal_rom.ckp_zero_anchor
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+ CKP_RAM_TRIM_0430);
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/* LDBSE at fulldissasembly.txt:20038 sign-extends the byte to a
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* word before the ADD. */
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int16_t v = (int16_t)(anchor
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- dCKP_OFFSET
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- pwm_cal_rom.can_dckp_offset_bias
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+ (int16_t)s_dfi_code);
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int16_t mod = pwm_cal_rom.ckp_modulus;
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/* Verbatim ROM modulo. JGE/JLE in the ROM are signed compares, so
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* the loops bracket v into [0, mod] inclusive. Replacing with `%`
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* would diverge for negative v under C90/C99 implementation-defined
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* sign-of-remainder rules. */
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while (v < 0) v = (int16_t)(v + mod);
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while (v > mod) v = (int16_t)(v - mod);
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CKP_ZERO_OFFSET = v;
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}
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/* FUN_55e0 @ 0x55e0 entry — detect change in (B_CKP_OFFSET >> 1) and
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* update dCKP_OFFSET; on change, FUN_6a4b is invoked. We always re-run
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* FUN_6a4b on the first call so consumers see a coherent
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* CKP_ZERO_OFFSET even before B_CKP_OFFSET first moves.
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*/
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int16_t get_ckp_zero(void)
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{
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static uint8_t initialized = 0;
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int16_t halved = shra16(B_CKP_OFFSET, 1);
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int16_t biased_now = (int16_t)(dCKP_OFFSET
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+ pwm_cal_rom.can_dckp_offset_bias);
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if (halved != biased_now) {
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dCKP_OFFSET = (int16_t)(halved
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- pwm_cal_rom.can_dckp_offset_bias);
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/* commitCKP_offset stays unused per user direction; future hook
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* for the FUN_56d8 flash-write sequence and the DAT_01e7 bit-7
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* persist-pending flag. */
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(void)commitCKP_offset;
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ckp_recompute_zero_offset();
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initialized = 1;
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} else if (!initialized) {
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ckp_recompute_zero_offset();
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initialized = 1;
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}
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return CKP_ZERO_OFFSET;
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}
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41
Core/Advance_Control/ckp_acquisition.h
Normal file
41
Core/Advance_Control/ckp_acquisition.h
Normal file
@@ -0,0 +1,41 @@
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/*
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* ckp_acquisition.h
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*
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* Created on: May 5, 2026
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* Author: herli
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*
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* Translates the CAN-supplied raw CKP offset (B_CKP_OFFSET, RW134 /
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* DAT_0134) into the ROM-equivalent runtime delta dCKP_OFFSET (DAT_0434)
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* and then into the canonical CKP zero-crossing offset CKP_ZERO_OFFSET
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* (DAT_0152). Mirrors ROM FUN_55e0 @ 0x55e0 → FUN_6a4b @ 0x6a4b.
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*/
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#ifndef ADVANCE_CONTROL_CKP_ACQUISITION_H_
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#define ADVANCE_CONTROL_CKP_ACQUISITION_H_
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#include <stdint.h>
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/* Inputs */
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extern int16_t B_CKP_OFFSET; /* RW134 / DAT_0134 — CAN raw input */
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extern uint8_t commitCKP_offset; /* unused for now (commit gate hook) */
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/* Internal RAM trims (DAT_0430 word, DAT_0404 signed byte). No runtime
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* writer was found in this ROM/car (project memory:
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* project_t06235_ckp_processing.md), so they sit at 0 unless a future
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* step wires them up. Exposed for diagnostic poking. */
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extern int16_t CKP_RAM_TRIM_0430;
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extern int8_t CKP_RAM_TRIM_0404;
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/* Outputs */
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extern int16_t dCKP_OFFSET; /* DAT_0434 — output of FUN_55e0 */
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extern int16_t CKP_ZERO_OFFSET; /* DAT_0152 — output of FUN_6a4b */
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/* Recompute dCKP_OFFSET from B_CKP_OFFSET (FUN_55e0), then recompute
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* CKP_ZERO_OFFSET (FUN_6a4b core derivation), then return
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* CKP_ZERO_OFFSET. The commit/flash-persist side-effects (FUN_56d8
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* sequence + DAT_01e7 bit-7) are stubbed via commitCKP_offset for a
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* future wiring step.
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*/
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int16_t get_ckp_zero(void);
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#endif /* ADVANCE_CONTROL_CKP_ACQUISITION_H_ */
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@@ -193,6 +193,11 @@ struct pwm_calibration {
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int16_t target_5e_min_clamp; /* cal+0x12A */
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int16_t can_aux_12e_max; /* cal+0x002 */
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/* CKP-zero acquisition (FUN_55e0 + FUN_6a4b chain) cal constants */
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int16_t ckp_zero_anchor; /* cal+0x050 — FUN_6a4b additive anchor */
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int16_t can_dckp_offset_bias; /* cal+0x052 — FUN_55e0/FUN_6a4b bias */
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int16_t ckp_modulus; /* cal+0x0A2 — FUN_6a4b modulo wrap */
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/* Recovery / sustained-error machinery */
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int16_t pi_state_c2_reload; /* cal+0x114 — reload value for pi_state_c2 on latch */
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int16_t inj_qty_thresh; /* cal+0x116 — inj-qty threshold for recovery vs reset */
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@@ -58,8 +58,10 @@ extern float RPM;
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extern float Temp;
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extern float ME, MEPI, B_FB_KW, dFi, B_PHIAD;
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extern int16_t B_FB_NW;
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extern int16_t B_CKP_OFFSET;
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extern uint8_t cilCount, safetySHUTOFF;
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extern uint8_t inj_mode, request_syncout_activation;
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extern uint8_t inj_mode, request_syncout_activation, commitCKP_offset;
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extern uint8_t memWrite;
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extern uint32_t quart_hour_counter;
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@@ -95,6 +97,7 @@ static const CanScaleDef SCALE_ME_RAM = { "mg/H", 1.0f/32.0f, 0.0f };
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static const CanScaleDef SCALE_DC = { "%", 100.0f/4095.0f, 0.0f };
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static const CanScaleDef SCALE_TEIN = { "uS", 1.0f/2.0f, 0.0f };
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static const CanScaleDef SCALE_RPM = { "1/min", 1.0f/4.0f, 0.0f };
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static const CanScaleDef SCALE_VOLTAGE= { "V", 0.0185f, -0.05f };
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@@ -322,6 +325,14 @@ static CanSymbolDef SYM_ID_SEND4[] = {
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#elif defined(cfgejemplo)
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#endif
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static CanSymbolDef SYM_ID_SEND3[] = {
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#if defined(T06235)
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{ "CKP_OFFSET", 0, 16, CAN_ENDIAN_INTEL, CAN_SYM_UX, 0,0, &B_CKP_OFFSET, &SCALE_FBKW, CAN_STORE_S16},
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{ "commit", 16, 1, CAN_ENDIAN_INTEL, CAN_SYM_UX, 0,0, &commitCKP_offset, NULL, CAN_STORE_U8},
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#endif
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};
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/* ===== RX: ID 0x720 SEND ===== */
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static CanSymbolDef SYM_ID_SEND_CUSTOM[] = {
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{ "PHI_OFFSET", 0, 16, CAN_ENDIAN_INTEL, CAN_SYM_SX, 0,0, &dFi, &SCALE_DEG_KW, CAN_STORE_FLOAT},
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@@ -360,8 +371,8 @@ const CanMessageDef MSG_ID_SEND3 = {
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.dir = CAN_DIR_RX,
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.dlc = 8,
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.name = "ID_SEND3",
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.symbols = NULL,
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.symbol_count = 0,
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.symbols = SYM_ID_SEND3,
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.symbol_count = (uint8_t)(sizeof(SYM_ID_SEND3)/sizeof(SYM_ID_SEND3[0])),
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.tx_template = NULL,
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.send_on_boot = 0,
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.rx_handler = NULL
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@@ -38,12 +38,12 @@
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/* ALL FBKW */
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#define FBKW_FEEDBACK_ZERO 49.559
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#define FBKW_FEEDBACK_ZERO 49.571
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#define FBKW_FEEDBACK_MIN -5.367
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#define FBKW_FEEDBACK_MAX 21.27
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#define FBKW_FEEDBACK_IC_DT 14
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#define FBKW_FEEDBACK_IC_DT 19
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/* CAN DEFINITIONS */
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#define CAN_BAUDRATE 500
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@@ -40,12 +40,12 @@
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/* ALL FBKW */
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#define FBKW_FEEDBACK_ZERO 49.559
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#define FBKW_FEEDBACK_ZERO 49.571 //49.559
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#define FBKW_FEEDBACK_MIN -5.367
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#define FBKW_FEEDBACK_MAX 21.27
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#define FBKW_FEEDBACK_IC_DT 14
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#define FBKW_FEEDBACK_IC_DT 19
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/* CAN DEFINITIONS */
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#define CAN_BAUDRATE 500
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@@ -97,6 +97,11 @@ void init_FuelMap(float *PHIAD) {
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void Timer1_FM_ISR(){
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phi_tick_1khz(&s_phi_state, &s_phi_cal);
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}
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void TW_FM_ISR(uint8_t currentTooth, uint32_t ic){
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//phi_tick_1khz(&s_phi_state, &s_phi_cal);
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}
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extern float forceTemp;
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float FM_GET_PHIAD(float RPM, float ME, float Temp) {
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s_rpm = RPM;
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@@ -278,7 +278,7 @@ float fb_2;
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uint8_t fb_lock;
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float new_fb = 0.0;
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float lpf_fb = 1.0;//0.4
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uint8_t feedbackMT = 0;
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uint8_t feedbackNew = 1;
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uint8_t valid = 0;
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float ckp_rpm = 0.0;
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@@ -302,11 +302,12 @@ void TW_CALC_FBKW_FEEDBACK(){
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return;
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}
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}
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uint8_t index0 = FBKW_FEEDBACK_ZERO / TW_TOOTH_ALPHA;
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float eff_ckp_zero = FBKW_GET_CKP_OFFSET();
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uint8_t index0 = eff_ckp_zero / TW_TOOTH_ALPHA - 1;
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teethCKP = index;
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uint8_t nteeths = TW_PERCYL_TEETH - index0 + 1;
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uint8_t nteeths = TW_PERCYL_TEETH - index0;
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uint32_t diffCKP_e = IC_CKP_Real >= edgeBuf[index0-1].ic ? IC_CKP_Real - edgeBuf[index0-1].ic : IC_CKP_Real - (-edgeBuf[index0-1].ic - 0xffffffff);
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/*float b_a = 1.0*FBKW_FEEDBACK_ZERO / TW_TOOTH_ALPHA - index0; //remaining angle
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@@ -328,9 +329,7 @@ void TW_CALC_FBKW_FEEDBACK(){
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//uint32_t diffCKP = toNext ? diffCKP_2 : diffCKP_1;
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uint32_t diffCKP = IC_CKP_Real >= edgeBuf[index0].ic ? IC_CKP_Real - edgeBuf[index0].ic : IC_CKP_Real - (-edgeBuf[index0].ic - 0xffffffff);
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if(feedbackMT){
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diffCKP = IC_CKP2 >= IC_MT ? IC_CKP2 - IC_MT : IC_CKP2 - (IC_MT - 0xffffffff);
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}
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//uint32_t diffCKP = IC_CKP2 >= IC_MT ? IC_CKP2 - IC_MT : IC_CKP2 - (IC_MT - 0xffffffff);
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float diffbot = 0;
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float difftop = 0;
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@@ -340,13 +339,18 @@ void TW_CALC_FBKW_FEEDBACK(){
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}
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}else{
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if(count_CKP > 1){
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if(feedbackMT){
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fb_2 = MT_RPM * 6.0 * diffCKP / refClock - dFi;
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if(feedbackNew){
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uint8_t now = 24;
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uint32_t P_seg = edgeBuf[now].ic - edgeBuf[index0].ic; // wrap-safe by uint32 modular arithmetic
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uint32_t T_lag = edgeBuf[now].ic - IC_CKP_Real; // same
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float fraction_before_engine_pulse = 1 - (1.0f*T_lag / P_seg);
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fb_2 = fraction_before_engine_pulse * (now - index0) * TW_TOOTH_ALPHA;
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}else{
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fb_2 = avgrpm * 6.0 * diffCKP_e / refClock + (index0-1) * TW_TOOTH_ALPHA - dFi;
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fb_2 = avgrpm * 6.0 * diffCKP_e / refClock + (index0-1) * TW_TOOTH_ALPHA;
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}
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||||
|
||||
fb_2 -= FBKW_FEEDBACK_ZERO;
|
||||
fb_2 += feedbackNew*45 - eff_ckp_zero;
|
||||
|
||||
if(fb_2 > FBKW_FEEDBACK_MIN && fb_2 < FBKW_FEEDBACK_MAX){ //si esta entre margenes
|
||||
new_fb = fb_2;
|
||||
@@ -359,14 +363,19 @@ void TW_CALC_FBKW_FEEDBACK(){
|
||||
|
||||
}else{
|
||||
//feedbackfirst = RPM * 6.0 * diffCKP / refClock;
|
||||
if(feedbackMT){
|
||||
fb_1 = ckp_rpm * 6.0 * diffCKP_e / refClock + (index0-1) * TW_TOOTH_ALPHA - dFi;
|
||||
if(feedbackNew){
|
||||
uint8_t now = 24;
|
||||
uint32_t P_seg = edgeBuf[now].ic - edgeBuf[index0].ic; // wrap-safe by uint32 modular arithmetic
|
||||
uint32_t T_lag = edgeBuf[now].ic - IC_CKP_Real; // same
|
||||
|
||||
float fraction_before_engine_pulse = 1 - (1.0f*T_lag / P_seg);
|
||||
fb_1 = fraction_before_engine_pulse * (now - index0) * TW_TOOTH_ALPHA;
|
||||
}else{
|
||||
//fb_1 = (toNext ? -1 : 1) * edgeBuf[index + toNext].rpm * 6.0 * diffCKP / refClock + (teethCKP + toNext) * TW_TOOTH_ALPHA - dFi;
|
||||
fb_1 = avgrpm * 6.0 * diffCKP_e / refClock + (index0-1) * TW_TOOTH_ALPHA - dFi;
|
||||
fb_1 = avgrpm * 6.0 * diffCKP_e / refClock + (index0-1) * TW_TOOTH_ALPHA;
|
||||
}
|
||||
|
||||
fb_1 -= FBKW_FEEDBACK_ZERO;
|
||||
fb_1 += feedbackNew*45 - eff_ckp_zero;
|
||||
|
||||
if(fb_1 > FBKW_FEEDBACK_MIN && fb_1 < FBKW_FEEDBACK_MAX){
|
||||
new_fb = fb_1;
|
||||
@@ -805,7 +814,7 @@ void TW_Service(){
|
||||
TM_UPDATE_INJECTION_RPM_AND_ALPHA(real_eoi, actual_phi1, IC_EOI, IC_TEIN);
|
||||
inj_rpm_pending = 0;
|
||||
}
|
||||
if(ckp_process_pending){
|
||||
if(ckp_process_pending && (currentTooth == 24)){ // esto es para la 504042, estaria bien revisar el resto...
|
||||
TW_CALC_FBKW_FEEDBACK();
|
||||
}
|
||||
|
||||
|
||||
Reference in New Issue
Block a user